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Feature #118

VHDL dependency analysis does not include FOR...GENERATE

Added by Esko Pekkarinen over 9 years ago. Updated almost 7 years ago.

Status:
New
Priority:
Normal
Assignee:
-
Target version:
Start date:
Due date:
% Done:

0%

Milestones:

Description

VHDL dependency analysis does not find dependencies to instaces declared with FOR..GENERATE clause. Add

Associated revisions

Revision 13628619 (diff)
Added by Joni-Matti Määttä about 12 years ago

[CORRECTIVE] Fixed the bus port naming bug (closes #118).

git-svn-id: svn://svn.code.sf.net/p/kactus2/code/trunk@184 f0aa6db5-7f46-43cc-a8a5-a31efdaafa67

History

#1 Updated by Anonymous over 7 years ago

  • Status changed from New to Closed
  • % Done changed from 0 to 100

Applied in changeset kactus2git|commit:13628619f9d2829f906517e6db6417364424f580.

#2 Updated by Esko Pekkarinen over 7 years ago

  • Status changed from Closed to New
  • % Done changed from 100 to 0

#3 Updated by George Cantwell almost 7 years ago

Here is the VHDL wiki article

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