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# Project Tracker Status Priority Subject Assignee Updated Target version Parent task Estimated time
55Kactus2FeatureNewNormal4 Context-based library filtering08.08.2013 09:33 AMKactus2 - Longterm
254Kactus2FeatureNewNormalAdd auto-save + recovery feature14.07.2015 09:29 AMKactus2 - Longterm
277Kactus2BugNewNormalAdd Row in Memory maps edition11.10.2016 01:22 PMKactus2 - Longterm
146Kactus2FeatureNewNormalAdd setting to define default path for new components/designs15.09.2014 12:41 PMKactus2 - Longterm
360Kactus2FeatureNewNormalAdd support for isInformative attribute in PortMapsEsko Pekkarinen07.05.2018 10:09 AMKactus2 - 3.7
200Kactus2FeatureNewNormalAdd warning to empty port map in bus interface24.10.2014 12:37 PMKactus2 - Longterm
3Kactus2FeatureNewNormalAltera application makefile generator18.12.2013 08:40 AMKactus2 - 2.10
132Kactus2FeatureNewNormalAnalysis of HW component connections in System Design16.07.2014 02:20 PMKactus2 - Longterm
361Kactus2FeatureIn ProgressNormalBus editor transactional portsMikko Teuho11.06.2018 01:49 PMKactus2 - 3.7Feature #304
57Kactus2FeatureNewHighCategorization for HW components 18.12.2013 08:49 AMKactus2 - 2.10
233Kactus2FeatureNewHighCheck compatibility of the design under its top component14.04.2016 12:45 PMKactus2 - Tmp
24Kactus2FeatureNewNormalComments for IP-XACT elements21.10.2013 08:20 AMKactus2 - 2.10
33Kactus2FeatureNewNormalComponent creating generator for bus08.08.2013 09:32 AMKactus2 - Longterm
324Kactus2BugNewNormalComponent instances have dublicate UUID21.11.2016 02:45 PMKactus2 - Longterm
362Kactus2FeatureNewNormalComponent transactional ports08.06.2018 11:30 AMKactus2 - 3.7Feature #304
60Kactus2FeatureNewNormalConnectivity analysis between components 27.09.2013 01:29 PMKactus2 - 2.9
81Kactus2FeatureNewNormalConnectivity visualization18.12.2013 08:40 AMKactus2 - 2.9
46Kactus2FeatureNewNormalConstraints, SW API08.08.2013 09:33 AMKactus2 - Longterm
257Kactus2BugNewNormalCopy-paste of rows occaisionally loses data17.07.2015 01:20 AM
158Kactus2FeatureNewNormalCopy/paste hierarchical table objects in component editorMikko Teuho20.06.2016 09:02 AMKactus2 - Longterm
109Kactus2FeatureNewNormalCreate hierarchical component in design27.05.2014 01:04 PMKactus2 - Longterm
245Kactus2FeatureNewNormalCreate physical ports for a bus interfaceEsko Pekkarinen13.06.2018 11:45 AMKactus2 - 3.724.00
41Kactus2FeatureNewLowDefault name for connections in design view08.08.2013 09:32 AMKactus2 - Longterm
58Kactus2FeatureNewHighDependency analysis when something is changed in IP15.12.2016 01:29 PMKactus2 - Longterm
56Kactus2BugNewNormalDescription of (clock) signals for ports 08.08.2013 09:33 AMKactus2 - Longterm
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